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Cypress Semiconductor /psoc63 /SCB0 /INTR_TX_SET

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Interpret as INTR_TX_SET

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (TRIGGER)TRIGGER 0 (NOT_FULL)NOT_FULL 0 (EMPTY)EMPTY 0 (OVERFLOW)OVERFLOW 0 (UNDERFLOW)UNDERFLOW 0 (BLOCKED)BLOCKED 0 (UART_NACK)UART_NACK 0 (UART_DONE)UART_DONE 0 (UART_ARB_LOST)UART_ARB_LOST

Description

Transmitter interrupt set request

Fields

TRIGGER

Write with ‘1’ to set corresponding bit in interrupt request register.
NOT_FULL

Write with ‘1’ to set corresponding bit in interrupt request register.
EMPTY

Write with ‘1’ to set corresponding bit in interrupt request register.
OVERFLOW

Write with ‘1’ to set corresponding bit in interrupt request register.
UNDERFLOW

Write with ‘1’ to set corresponding bit in interrupt request register.
BLOCKED

Write with ‘1’ to set corresponding bit in interrupt request register.
UART_NACK

Write with ‘1’ to set corresponding bit in interrupt request register.
UART_DONE

Write with ‘1’ to set corresponding bit in interrupt request register.
UART_ARB_LOST

Write with ‘1’ to set corresponding bit in interrupt request register.

Links

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Register License

Copyright 2016-2018 Cypress Semiconductor Corporation \n Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License.
You may obtain a copy of the License at \n
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and
limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data